Merge #386

386: Nrf5340 netcore r=jonas-schievink a=Sandraak

Added support for the nrf5340-netcore. This support consists mostly of cfg annotations and some very small adjustments.

Co-authored-by: Sandra ter Maat <[email protected]>

CHANGELOG.md

@@ -3,6 +3,7 @@
 ## Unreleased
 
 - Fixed the nvmc erase procedure on nRF91 & nRF53 ([#387])
+- Added support for the nrf5340-net-core.
 
 ## [0.15.0]
 

Cargo.ci.toml

@@ -9,6 +9,7 @@ members = [
   "nrf52840-hal",
   "nrf52840-hal-tests",
   "nrf5340-app-hal",
+  "nrf5340-net-hal",
   "nrf9160-hal",
   "examples/*",
 ]

nrf-hal-common/Cargo.toml

@@ -64,6 +64,10 @@ version = "0.11.0"
 optional = true
 version = "0.11.0"
 
+[dependencies.nrf5340-net-pac]
+optional = true
+version = "0.11.0"
+
 [dependencies.nrf9160-pac]
 optional = true
 version = "0.11.0"
@@ -85,4 +89,5 @@ doc = []
 52833 = ["nrf52833-pac", "nrf-usbd"]
 52840 = ["nrf52840-pac", "nrf-usbd"]
 5340-app = ["nrf5340-app-pac"]
+5340-net = ["nrf5340-net-pac"]
 9160 = ["nrf9160-pac"]

nrf-hal-common/src/adc.rs

@@ -91,8 +91,14 @@ where
             5 => self.0.config.modify(|_, w| w.psel().analog_input5()),
             6 => self.0.config.modify(|_, w| w.psel().analog_input6()),
             7 => self.0.config.modify(|_, w| w.psel().analog_input7()),
-            8 => self.0.config.modify(|_, w| w.inpsel().supply_one_third_prescaling()),
-            9 => self.0.config.modify(|_, w| w.inpsel().supply_two_thirds_prescaling()),
+            8 => self
+                .0
+                .config
+                .modify(|_, w| w.inpsel().supply_one_third_prescaling()),
+            9 => self
+                .0
+                .config
+                .modify(|_, w| w.inpsel().supply_two_thirds_prescaling()),
             // This can never happen the only analog pins have already been defined
             // PAY CLOSE ATTENTION TO ANY CHANGES TO THIS IMPL OR THE `channel_mappings!` MACRO
             _ => unsafe { unreachable_unchecked() },
@@ -105,7 +111,9 @@ where
 
         self.0.events_end.write(|w| unsafe { w.bits(0) });
         // Restore original input selection
-        self.0.config.modify(|_, w| w.inpsel().variant(original_inpsel.variant().unwrap()));
+        self.0
+            .config
+            .modify(|_, w| w.inpsel().variant(original_inpsel.variant().unwrap()));
 
         // Max resolution is 10 bits so casting is always safe
         Ok(self.0.result.read().result().bits() as i16)

nrf-hal-common/src/ccm.rs

@@ -45,15 +45,26 @@
 //! encryption/decryption. The scratch slice must have a minimum length of 43 bytes, or
 //! (16 + `Packet Length`) bytes, whatever is largest.
 
+#[cfg(not(feature = "5340-net"))]
 use crate::{
     pac::{AAR, CCM},
     slice_in_ram,
 };
+
+#[cfg(feature = "5340-net")]
+use crate::{
+    pac::{AAR_NS as AAR, CCM_NS as CCM},
+    slice_in_ram,
+};
+
 use core::sync::atomic::{compiler_fence, Ordering};
 
-#[cfg(not(feature = "51"))]
+#[cfg(not(any(feature = "51", feature = "5340-net")))]
 use crate::pac::ccm::mode::{DATARATE_A, LENGTH_A};
 
+#[cfg(feature = "5340-net")]
+use crate::pac::ccm_ns::mode::{DATARATE_A, LENGTH_A};
+
 const MINIMUM_SCRATCH_AREA_SIZE: usize = 43;
 const HEADER_SIZE: usize = 3;
 const LENGTH_HEADER_INDEX: usize = 1;
@@ -69,15 +80,22 @@ pub enum DataRate {
     _1Mbit,
     #[cfg(not(feature = "51"))]
     _2Mbit,
+    #[cfg(feature = "5340-net")]
+    _125Kbps,
+    #[cfg(feature = "5340-net")]
+    _500Kbps,
 }
 
 #[cfg(not(feature = "51"))]
 impl From<DataRate> for DATARATE_A {
     fn from(data_rate: DataRate) -> Self {
-        if data_rate == DataRate::_1Mbit {
-            DATARATE_A::_1MBIT
-        } else {
-            DATARATE_A::_2MBIT
+        match data_rate {
+            DataRate::_1Mbit => DATARATE_A::_1MBIT,
+            DataRate::_2Mbit => DATARATE_A::_2MBIT,
+            #[cfg(feature = "5340-net")]
+            DataRate::_125Kbps => DATARATE_A::_125KBPS,
+            #[cfg(feature = "5340-net")]
+            DataRate::_500Kbps => DATARATE_A::_500KBPS,
         }
     }
 }
@@ -253,7 +271,8 @@ impl Ccm {
                 feature = "52840",
                 feature = "52833",
                 feature = "52811",
-                feature = "52810"
+                feature = "52810",
+                feature = "5340-net"
             ))]
             // NOTE(unsafe) Any 8bits pattern is safe to write to this register
             self.regs
@@ -382,7 +401,8 @@ impl Ccm {
                 feature = "52840",
                 feature = "52833",
                 feature = "52811",
-                feature = "52810"
+                feature = "52810",
+                feature = "5340-net"
             ))]
             // NOTE(unsafe) Any 8bits pattern is safe to write to this register
             self.regs

nrf-hal-common/src/clocks.rs

@@ -1,9 +1,9 @@
 //! Configuration and control of the High and Low Frequency Clock sources.
 
-#[cfg(any(feature = "9160", feature = "5340-app"))]
+#[cfg(any(feature = "9160", feature = "5340-app", feature = "5340-net"))]
 use crate::pac::CLOCK_NS as CLOCK;
 
-#[cfg(not(any(feature = "9160", feature = "5340-app")))]
+#[cfg(not(any(feature = "9160", feature = "5340-app", feature = "5340-net")))]
 use crate::pac::CLOCK;
 
 // ZST Type States
@@ -156,7 +156,12 @@ impl<H, L> Clocks<H, L, LfOscStopped> {
     }
 
     /// Use the internal RC Oscillator for the low frequency clock source.
-    #[cfg(not(any(feature = "9160", feature = "5340-app", feature = "51")))]
+    #[cfg(not(any(
+        feature = "9160",
+        feature = "5340-app",
+        feature = "5340-net",
+        feature = "51"
+    )))]
     pub fn set_lfclk_src_rc(self) -> Clocks<H, Internal, LfOscStopped> {
         self.periph
             .lfclksrc
@@ -170,7 +175,12 @@ impl<H, L> Clocks<H, L, LfOscStopped> {
     }
 
     /// Generate the Low Frequency clock from the high frequency clock source.
-    #[cfg(not(any(feature = "9160", feature = "5340-app", feature = "51")))]
+    #[cfg(not(any(
+        feature = "9160",
+        feature = "5340-app",
+        feature = "5340-net",
+        feature = "51"
+    )))]
     pub fn set_lfclk_src_synth(self) -> Clocks<H, LfOscSynthesized, LfOscStopped> {
         self.periph
             .lfclksrc
@@ -184,7 +194,12 @@ impl<H, L> Clocks<H, L, LfOscStopped> {
     }
 
     /// Use an external crystal to drive the low frequency clock.
-    #[cfg(not(any(feature = "9160", feature = "5340-app", feature = "51")))]
+    #[cfg(not(any(
+        feature = "9160",
+        feature = "5340-app",
+        feature = "5340-net",
+        feature = "51"
+    )))]
     pub fn set_lfclk_src_external(
         self,
         cfg: LfOscConfiguration,

nrf-hal-common/src/ecb.rs

@@ -2,7 +2,11 @@
 //!
 //! The ECB encryption block supports 128 bit AES encryption (encryption only, not decryption).
 
+#[cfg(not(feature = "5340-net"))]
 use crate::pac::ECB;
+#[cfg(feature = "5340-net")]
+use crate::pac::ECB_NS as ECB;
+
 use core::sync::atomic::{compiler_fence, Ordering};
 
 /// Error type to represent a sharing conflict during encryption.

nrf-hal-common/src/gpio.rs

@@ -40,9 +40,8 @@ pub enum Port {
     /// Port 0 Secure, available on nRF53
     #[cfg(any(feature = "5340-app"))]
     Port0Secure,
-
-    /// Port 1, only available on some nRF52 MCUs.
-    #[cfg(any(feature = "52833", feature = "52840"))]
+    /// Port 1, only available on some nRF52 MCUs and nRF5340.
+    #[cfg(any(feature = "52833", feature = "52840", feature = "5340-net"))]
     Port1,
 }
 
@@ -63,18 +62,26 @@ pub struct Pin<MODE> {
 #[cfg(feature = "51")]
 use crate::pac::{gpio, GPIO as P0};
 
-#[cfg(any(feature = "5340-app", feature = "9160"))]
+#[cfg(any(feature = "5340-app", feature = "5340-net", feature = "9160"))]
 use crate::pac::{p0_ns as gpio, P0_NS as P0};
 
 #[cfg(feature = "5340-app")]
 use crate::pac::P0_S;
 
-#[cfg(not(any(feature = "9160", feature = "5340-app", feature = "51")))]
+#[cfg(not(any(
+    feature = "9160",
+    feature = "5340-app",
+    feature = "5340-net",
+    feature = "51"
+)))]
 use crate::pac::{p0 as gpio, P0};
 
 #[cfg(any(feature = "52833", feature = "52840"))]
 use crate::pac::P1;
 
+#[cfg(feature = "5340-net")]
+use crate::pac::P1_NS as P1;
+
 use crate::hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin};
 use void::Void;
 
@@ -84,7 +91,7 @@ impl<MODE> Pin<MODE> {
             Port::Port0 => 0x00,
             #[cfg(any(feature = "5340-app"))]
             Port::Port0Secure => 0x20,
-            #[cfg(any(feature = "52833", feature = "52840"))]
+            #[cfg(any(feature = "52833", feature = "52840", feature = "5340-net"))]
             Port::Port1 => 0x20,
         };
         Self {
@@ -102,20 +109,30 @@ impl<MODE> Pin<MODE> {
 
     #[inline]
     pub fn pin(&self) -> u8 {
-        #[cfg(any(feature = "52833", feature = "52840", feature = "5340-app"))]
+        #[cfg(any(
+            feature = "52833",
+            feature = "52840",
+            feature = "5340-app",
+            feature = "5340-net"
+        ))]
         {
             self.pin_port & 0x1f
         }
 
-        #[cfg(not(any(feature = "52833", feature = "52840", feature = "5340-app")))]
+        #[cfg(not(any(
+            feature = "52833",
+            feature = "52840",
+            feature = "5340-app",
+            feature = "5340-net"
+        )))]
         {
             self.pin_port
         }
     }
 
     #[inline]
     pub fn port(&self) -> Port {
-        #[cfg(any(feature = "52833", feature = "52840"))]
+        #[cfg(any(feature = "52833", feature = "52840", feature = "5340-net"))]
         {
             if self.pin_port & 0x20 == 0 {
                 Port::Port0
@@ -132,8 +149,12 @@ impl<MODE> Pin<MODE> {
                 Port::Port0Secure
             }
         }
-
-        #[cfg(not(any(feature = "52833", feature = "52840", feature = "5340-app")))]
+        #[cfg(not(any(
+            feature = "52833",
+            feature = "52840",
+            feature = "5340-app",
+            feature = "5340-net"
+        )))]
         {
             Port::Port0
         }
@@ -147,9 +168,9 @@ impl<MODE> Pin<MODE> {
     fn block(&self) -> &gpio::RegisterBlock {
         let ptr = match self.port() {
             Port::Port0 => P0::ptr(),
-            #[cfg(any(feature = "5340-app"))]
+            #[cfg(feature = "5340-app")]
             Port::Port0Secure => P0_S::ptr(),
-            #[cfg(any(feature = "52833", feature = "52840"))]
+            #[cfg(any(feature = "52833", feature = "52840", feature = "5340-net"))]
             Port::Port1 => P1::ptr(),
         };
 
@@ -339,10 +360,15 @@ pub enum OpenDrainConfig {
 #[cfg(feature = "51")]
 use crate::pac::gpio::pin_cnf;
 
-#[cfg(any(feature = "5340-app", feature = "9160"))]
+#[cfg(any(feature = "5340-app", feature = "5340-net", feature = "9160"))]
 use crate::pac::p0_ns::pin_cnf;
 
-#[cfg(not(any(feature = "9160", feature = "5340-app", feature = "51")))]
+#[cfg(not(any(
+    feature = "9160",
+    feature = "5340-app",
+    feature = "5340-net",
+    feature = "51"
+)))]
 use crate::pac::p0::pin_cnf;
 
 impl OpenDrainConfig {
@@ -647,7 +673,7 @@ gpio!(P0, p0, p0, Port::Port0, [
 
 // The p1 types are present in the p0 module generated from the
 // svd, but we want to export them in a p1 module from this crate.
-#[cfg(any(feature = "52833", feature = "52840"))]
+#[cfg(any(feature = "52833", feature = "52840", feature = "5340-net"))]
 gpio!(P1, p0, p1, Port::Port1, [
     P1_00: (p1_00,  0, Disconnected),
     P1_01: (p1_01,  1, Disconnected),
@@ -667,7 +693,7 @@ gpio!(P1, p0, p1, Port::Port1, [
     P1_15: (p1_15, 15, Disconnected),
 ]);
 
-#[cfg(any(feature = "5340-app"))]
+#[cfg(feature = "5340-app")]
 gpio!(P0_S, p0, p0_s, Port::Port0Secure, [
     P0_00: (p0_00,  0, Disconnected),
     P0_01: (p0_01,  1, Disconnected),